Simon Y. Berkovich

 Phone: 202-994-8248
E-mail: berkov AT gwu DOT edu
Campus Location(s): Phillips 711
Office Hours: Tuesday and Thursday 11:00 AM - 1:00 PM

Dr. Berkovich played a leading role in a number of research and development projects on the design of advanced hardware and software systems. Those projects include construction of superconductive associative memory, development of large information systems for economics, investigation of computer communications for multiprocessor systems, and enhancement of information retrieval procedures.

Dr. Berkovich has several hundred professional publications and is an author of five books. He holds 30 patents. Among his inventions is a method for dynamic file construction that later become known as B-tree and extendible hashing. In 2002, he was elected a member of the European Academy of Sciences "for an outstanding contribution to computer science and the development of fundamental computational algorithms".

Interests

Algorithms and data structures; Computer organization; Associative memory; Information systems; Cellular automata modeling; Biological cybernetics

Education

MS in Applied Physics, 1960, Moscow Physico-Technological Institute

PhD in Computer Science, 1964, Institute of Precision Mechanics and Computer Technology, USSR Academy of Sciences

Selected Publications

1. S. Berkovich, On the remote interaction of biological objects with close genetic structures , Annals of the European Academy of Sciences, pp. 111-130, 2003.
2. S. Berkovich, G. Lapir, M. Mack, "A bit-counting algorithm using the frequency division principle" , Software - Practice And Experience, Vol. 30, Issue 14, pp. 1531-1540, 2000.
3. S. Berkovich, Eyas El-Qawasmeh, "Reversing the error-correction scheme for a fault-tolerant indexing" , The Computer Journal, Vol. 43, No 1, pp. 54-64, February 2000.
4. E. Berkovich, S. Berkovich, "A Combinatorial Architecture for Instruction-Level Parallelism" , Microprocessors and Microsystems, Vol. 22, pp. 23-31, 1998.
5. S. Berkovich, Lin-ching Chang, "A Multiprocessor Network Arranging Replicated Objects in Pairwise Balanced Combinatorial Designs" , Journal of Circuits, Systems, and Computers, Vol. 6, No 1, pp. 85-91, 1996.
6. S. Berkovich, "Multiprocessor Interconnection Network Using Pairwise Balanced Combinatorial Designs" , Information Processing Letters, pp. 217-224, 1994